When being put into practical services, a semiconductor device chip is usually packaged in a casket package or in a plastic molded package, for the purpose to be protected from external hazards including mechanical, chemical and radioactive ones. In order to satisfy an increasingly severer requirement for a compact and thinner semiconductor device, a semiconductor device packaged in a chip scale package was developed. One example thereof is disclosed in TOKU KAI HEI 8-125066 or JP-A 8-125066, the cross section thereof being copied in FIG. 1 attached hereto.
Referring to FIG. 1, a semiconductor device chip 1 having at least one semiconductor device element disposed therein and having plural bonding pads 2 arranged on the top surface thereof is provided with plural leads 3 each of which has a side view of an L-shape and each of which is adhered on the top surface of the semiconductor device chip 1. A hardened adhesive employed for adhering the leads 3 on the semiconductor device chip 1 is shown by a label 4 in the drawing. Each of the leads 3 is connected with each of the bonding pads 2 employing a bonding wire made of Au or the like. All the surfaces of the semiconductor device chip 1 is covered by a molded plastic layer 6, remaining tips 3A of the leads 3 uncovered. On the tips 3A, external terminals 7 made of a solder or the like are arranged, to be employed for connecting each of the foregoing leads 3 with each of wirings arranged on a printed circuit board (not shown) on which the foregoing semiconductor device packaged in a plastic molded package is scheduled to be mounted. FIG. 2 illustrates the rear surface of the packaged semiconductor device of which the cross section is illustrated in FIG. 1. As is clear from the drawings, the horizontal dimension of the packaged semiconductor device is not so larger than that of the semiconductor device chip proper 1. The thickness of the packaged semiconductor device is small as well, because the thickness of the molded plastic layer 6 is not so large.
Unfortunately, however, the packaged semiconductor device of which the cross section is illustrated in FIG. 1 is involved with a drawback in which the production procedure is complicated particularly for the steps for producing the leads 3 having a side view of an L-shape. The other drawback accompanying the packaged semiconductor device of which the cross section is illustrated in FIG. 1 is a less sufficient grade of heat dissipation efficiency which is caused by a rather thick plastic layers covering the semiconductor device chip 1.